For all FPGA building blocks, there is a corresponding DSP software library and hardware schematics. The different toolkit elements and how they interact will be described in the context of serial communication.
An industry standard UART is implemented in the FPGA as a building block. The device driver (DSP software) supports the various UART modes operation including setup of registers, data poll, trigger on data arrival, output register empty. The DSP software also provides a parser for ASCII and binary communication protocols. UART interface out of the FPGA consists of Tx, Rx, and the handshake signals CTS, and RTS. These are TTL level signals and require a line drive transceiver module to convert them to RS-232 (or RS-485) levels. Hardware schematics for both signal protocols have been generated and tested and can be rapidly implemented.
Finally, a communications driver on the PC is available to facilitate the development of PC software.