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MityDSP Pinouts
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MityDSP Platform I/O's provide the bridge between the CPU engine the I/O carrier card.
The 98 available I/O's, configurable for interface customization, enable the platform to accommodate almost unlimited combinations of interfaces to precisely address your interface needs.
|
Key
| P |
Power |
| J |
JTAG |
| M |
McBSP |
| R |
Reset |
| C |
Clock |
| L |
LVDS |
| I |
Input |
| O |
Output |
| IO |
Input / Output |
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| Pin |
Signal Name |
Signal Type |
Pin |
Signal Name |
Signal Type |
| A1 |
3.3V |
P |
B1 |
3.3V |
P |
| A2 |
GND |
P |
B2 |
GND |
P |
| A3 |
DSP_TMS |
J, I |
B3 |
MRESET |
R, I |
| A4 |
DSP_TDO |
J, O |
B4 |
DSP_TRST |
J, I |
| A5 |
DSP_TDI |
J, I |
B5 |
DSP_EMU1 |
J, I |
| A6 |
DSP_TCK |
J, I |
B6 |
DSP_EMU0 |
J, I |
| A7 |
CLKS0 |
M, IO |
B7 |
CLKS1 |
M, IO |
| A8 |
CLKR0 |
M, IO |
B8 |
CLKR1 |
M, IO |
| A9 |
CLKX0 |
M, IO |
B9 |
CLKX1 |
M, IO |
| A10 |
DR0 |
M, I |
B10 |
DR1 |
M, I |
| A11 |
DX0 |
M, O |
B11 |
DX1 |
M, O |
| A12 |
FSR0 |
M, IO |
B12 |
FSR1 |
M, IO |
| A13 |
FSX0 |
M, IO |
B13 |
FSX1 |
M, IO |
| A14 |
GND |
P |
B14 |
GND |
P |
| A15 |
1.23V |
P |
B15 |
1.23V |
P |
| A16 |
RESET# |
R, O |
B16 |
CLKOUT2 |
C, O |
| A17 |
RESET |
R, O |
B17 |
CLKOUT3 |
C, O |
| A18 |
GND |
P |
B18 |
GND |
P |
| A19 |
FPGA_TCK |
J,I |
B19 |
FPGA_TDO |
J, O |
| A20 |
FPGA_TDI |
J,I |
B20 |
FPGA_TMS |
J, I |
| A21 through A59 |
Available I/O |
IO |
B21 through B59 |
Available I/O |
IO |
| A60 |
GND |
P |
B60 |
GND |
P |
| A61 through A70 |
Available I/O |
L, IO |
B61 through B70 |
Available I/O |
L, IO |
| A71 |
GND |
P |
B71 |
GND |
P |
| A72 |
2.5V |
P |
B72 |
2.5V |
P
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