Feature
TI DSP Processor
C6711
C6711
C674x
None
C674x
C6454 / 555
 Max Speed [MHz]
250
250
450
---
450
1,200
 L1 Program Cache
4 KB
4 KB
32 KB
---
32 KB
32 KB
 L1 Data Cache
4 KB
4 KB
32 KB
---
32 KB
32 KB
 Internal RAM
64 KB
64 KB
256 KB
---
256 KB
2048 KB
TI App Processor
None
None
ARM926EJ-S
ARM926EJ-S
None
None
 Max Speed [MHz]
---
---
450
456
---
---
 L1 Program Cache
---
---
16 KB
16 KB
---
---
 L1 Data Cache
---
---
16 KB
16 KB
---
---
 Internal RAM
---
---
8 KB
8 KB
---
---
FPGA
XC3S400
XC3S1000
XC6SLX16
XC6SLX16
XC6SLX16
X3CS2000
 Slices
3,584
7,680
2,2784
2,2784
2,2784
20,480
 Logic Cells
8,064
17,280
14,579
14,579
14,579
46,080
 Block RAM
288 Kb
432 Kb
576 Kb
576 Kb
576 Kb
720 Kb
Memory
 
 
 
 
 
 
 CPU RAM
8 MB
32 MB
128 MB
128 MB
128 MB
128 MB
 CPU RAM Throughput
400 MB/sec
400 MB/sec
532 MB/sec
532 MB/sec
532 MB/sec
2000 MB/sec
 NOR FLASH
2 M
16 M
8 M
8 M
8 M
16 M
 NAND FLASH
None
None
256 MB
256 MB
256 MB
None
 FPGA RAM
8 M1
32 M1
N/A
N/A
N/A
64 M
 FPGA RAM Throughput
400 MB/sec
400 MB/sec
N/A
N/A
N/A
400 MB/sec
Interface
SO-DIMM-144
SO-DIMM-144
SO-DIMM-200
SO-DIMM-200
SO-DIMM-200
SO-DIMM-200
 Required Voltages
3.3, 2.5, 1.23
3.3, 2.5, 1.23
3.3
3.3
3.3
3.3
 Avail FPGA I/O
100
100
96
96
96
140
 Ethernet MAC
03
03
10/100
10/100
10/100
10/100/1000
 McBSP Ports
2
2
2
2
2
2
 LCD
02
02
1
1
1
N/A
 VPIF
N/A
N/A
1
1
1
N/A
 MMC/SD
07
07
1
1
1
07
 SATA
N/A
N/A
1
1
1
N/A
 I2C / SPI
06
06
2 / 26
2 / 26
2 / 26
16
Availability
In Production
In Production
In Production
In Production
In Production
In Production

 Notes:

  1. FPGA and CPU share RAM via DSP EMIF, 100 MHz clock rate maximum.
  2. LCD interface core is available for the FPGA to drive local and remote LCD display.
  3. Soft FPGA MAC cores are available for 10/100 Mbit Ethernet Phy Control.
  4. Spartan-6 features a 6 input LUT allowing for significantly more logic in the same number of slices when compared to a Spartan-3
  5. TMS6455 Option Including 8 Rocket I/O ports is available upon request.
  6. Additional I2C and SPI interfaces may be added with the FPGA.
  7. SD Interface may be added with the FPGA.